ItaniumWikipedia Open wikipedia design.
Itanium 2 processor
|Produced||From mid-2001 to present|
|Common manufacturer(s)|| |
|Max. CPU clock rate||733 MHz to 2.66 GHz|
|FSB speeds||300 MHz to 667 MHz|
|Cores||1, 2, 4 or 8|
Itanium (// eye-TAY-nee-əm) is a family of 64-bit Intel microprocessors that implement the Intel Itanium architecture (formerly called IA-64). Intel markets the processors for enterprise servers and high-performance computing systems. The Itanium architecture originated at Hewlett-Packard (HP), and was later jointly developed by HP and Intel.
Itanium-based systems have been produced by HP (the HP Integrity Servers line) and several other manufacturers. In 2008, Itanium was the fourth-most deployed microprocessor architecture for enterprise-class systems, behind x86-64, Power Architecture, and SPARC.[needs update]
- 1 History
- 2 Market share
- 3 Hardware support
- 4 Software support
- 5 Competition
- 6 Supercomputers and high-performance computing
- 7 Processors
- 8 Market reception
- 9 Timeline
- 10 See also
- 11 References
- 12 External links
In 1989, HP determined that Reduced Instruction Set Computing (RISC) architectures were approaching a processing limit at one instruction per cycle. HP researchers investigated a new architecture, later named Explicitly Parallel Instruction Computing (EPIC), that allows the processor to execute multiple instructions in each clock cycle. EPIC implements a form of very long instruction word (VLIW) architecture, in which a single instruction word contains multiple instructions. With EPIC, the compiler determines in advance which instructions can be executed at the same time, so the microprocessor simply executes the instructions and does not need elaborate mechanisms to determine which instructions to execute in parallel. The goal of this approach is twofold: to enable deeper inspection of the code at compile time to identify additional opportunities for parallel execution, and to simplify processor design and reduce energy consumption by eliminating the need for runtime scheduling circuitry.
HP believed that it was no longer cost-effective for individual enterprise systems companies such as itself to develop proprietary microprocessors, so it partnered with Intel in 1994 to develop the IA-64 architecture, derived from EPIC. Intel was willing to undertake a very large development effort on IA-64 in the expectation that the resulting microprocessor would be used by the majority of enterprise systems manufacturers. HP and Intel initiated a large joint development effort with a goal of delivering the first product, Merced, in 1998.
During development, Intel, HP, and industry analysts predicted that IA-64 would dominate in servers, workstations, and high-end desktops, and eventually supplant RISC and complex instruction set computing (CISC) architectures for all general-purpose applications. Compaq and Silicon Graphics decided to abandon further development of the Alpha and MIPS architectures respectively in favor of migrating to IA-64.
Several groups ported operating systems for the architecture, including Microsoft Windows, OpenVMS, Linux, HP-UX, Solaris, Tru64 UNIX, and Monterey/64. The latter three were canceled before reaching the market. By 1997, it was apparent that the IA-64 architecture and the compiler were much more difficult to implement than originally thought, and the delivery timeframe of Merced began slipping. Technical difficulties included the very high transistor counts needed to support the wide instruction words and the large caches. There were also structural problems within the project, as the two parts of the joint team used different methodologies and had slightly different priorities. Since Merced was the first EPIC processor, the development effort encountered more unanticipated problems than the team was accustomed to. In addition, the EPIC concept depends on compiler capabilities that had never been implemented before, so more research was needed.
Intel announced the official name of the processor, Itanium, on October 4, 1999. Within hours, the name Itanic had been coined on a Usenet newsgroup, a reference to the RMS Titanic, the "unsinkable" ocean liner that sank on her maiden voyage in 1912. "Itanic" has since often been used by The Register, and others, to imply that the multibillion-dollar investment in Itanium—and the early hype associated with it—would be followed by its relatively quick demise.
Itanium (Merced): 2001
|Produced||From June 2001 to June 2002|
|Common manufacturer(s)|| |
|Max. CPU clock rate||733 MHz to 800 MHz|
|FSB speeds||266 MT/s|
|Core name(s)|| |
|L2 cache||96 KB|
|L3 cache||2 or 4 MB|
By the time Itanium was released in June 2001, its performance was not superior to competing RISC and CISC processors. Itanium competed at the low-end (primarily four-CPU and smaller systems) with servers based on x86 processors, and at the high end with IBM's POWER architecture and Sun Microsystems's SPARC architecture. Intel repositioned Itanium to focus on high-end business and HPC computing, attempting to duplicate x86's successful "horizontal" market (i.e., single architecture, multiple systems vendors). The success of this initial processor version was limited to replacing PA-RISC in HP systems, Alpha in Compaq systems and MIPS in SGI systems, though IBM also delivered a supercomputer based on this processor. POWER and SPARC remained strong, while the 32-bit x86 architecture continued to grow into the enterprise space, building on economies of scale fueled by its enormous installed base.
Only a few thousand systems using the original Merced Itanium processor were sold, due to relatively poor performance, high cost and limited software availability. Recognizing that the lack of software could be a serious problem for the future, Intel made thousands of these early systems available to independent software vendors (ISVs) to stimulate development. HP and Intel brought the next-generation Itanium 2 processor to market a year later.
Itanium 2: 2002–2010
Itanium 2 processor
|Produced||From 2002 to 2010|
|Common manufacturer(s)|| |
|Max. CPU clock rate||900 MHz to 2.53 GHz|
|Cores||1, 2, 4 or 8|
|Core name(s)|| |
|L2 cache|| 256 KB on Itanium2 |
256 KB (D) + 1 MB(I) or 512 KB (I) on (Itanium2 9x00 series)
|L3 cache||1.5-32 MB|
The Itanium 2 processor was released in 2002, and was marketed for enterprise servers rather than for the whole gamut of high-end computing. The first Itanium 2, code-named McKinley, was jointly developed by HP and Intel. It relieved many of the performance problems of the original Itanium processor, which were mostly caused by an inefficient memory subsystem. McKinley contains 221 million transistors (of which 25 million are for logic), measured 19.5 mm by 21.6 mm (421 mm2) and was fabricated in a 180 nm, bulk CMOS process with six layers of aluminium metallization.
In 2003, AMD released the Opteron CPU, which implements its own 64-bit architecture called AMD64. Opteron gained rapid acceptance in the enterprise server space because it provided an easy upgrade from x86. Under influence by Microsoft, Intel responded by implementing AMD's x86-64 instruction set architecture instead of IA-64 in its Xeon microprocessors in 2004, resulting in a new industry-wide de facto standard.
Intel released a new Itanium 2 family member, codenamed Madison, in 2003. Madison uses a 130 nm process and was the basis of all new Itanium processors until Montecito was released in June 2006.
In March 2005, Intel announced that it was working on a new Itanium processor, codenamed Tukwila, to be released in 2007. Tukwila would have four processor cores and would replace the Itanium bus with a new Common System Interface, which would also be used by a new Xeon processor. Later that year, Intel revised Tukwila's delivery date to late 2008.
In November 2005, the major Itanium server manufacturers joined with Intel and a number of software vendors to form the Itanium Solutions Alliance to promote the architecture and accelerate software porting. The Alliance announced that its members would invest $10 billion in Itanium solutions by the end of the decade.
Intel released the Itanium 2 9100 series, codenamed Montvale, in November 2007. In May 2009, the schedule for Tukwila, its follow-on, was revised again, with release to OEMs planned for the first quarter of 2010.
Itanium 9300 (Tukwila): 2010
The Itanium 9300 series processor, codenamed Tukwila, was released on February 8, 2010, with greater performance and memory capacity.
The device uses a 65 nm process, includes two to four cores, up to 24 MB on-die caches, Hyper-Threading technology and integrated memory controllers. It implements double-device data correction, which helps to fix memory errors. Tukwila also implements Intel QuickPath Interconnect (QPI) to replace the Itanium bus-based architecture. It has a peak interprocessor bandwidth of 96 GB/s and a peak memory bandwidth of 34 GB/s. With QuickPath, the processor has integrated memory controllers and interfaces the memory directly, using QPI interfaces to directly connect to other processors and I/O hubs. QuickPath is also used on Intel processors using the Nehalem microarchitecture, making it probable that Tukwila and Nehalem will be able to use the same chipsets. Tukwila incorporates four memory controllers, each of which supports multiple DDR3 DIMMs via a separate memory controller, much like the Nehalem-based Xeon processor code-named Beckton.
Itanium 9500 (Poulson): 2012
This section needs to be updated.(April 2017)
The Itanium 9500 series processor, codenamed Poulson, is the follow-on processor to Tukwila and was released on November 8, 2012.[not in citation given] According to Intel, it skips the 45 nm process technology and uses a 32 nm process technology. It features eight cores and has a 12-wide issue architecture, multithreading enhancements, and new instructions to take advantage of parallelism, especially in virtualization. The Poulson L3 cache size is 32 MB. L2 cache size is 6 MB, 512 I KB, 256 D KB per core. Die size is 544 mm², less than its predecessor Tukwila (698.75 mm²).
At ISSCC 2011, Intel presented a paper called "A 32nm 3.1 Billion Transistor 12-Wide-Issue Itanium Processor for Mission Critical Servers." Given Intel's history of disclosing details about Itanium microprocessors at ISSCC, this paper most likely refers to Poulson. Analyst David Kanter speculates that Poulson will use a new microarchitecture, with a more advanced form of multithreading that uses up to two threads, to improve performance for single threaded and multithreaded workloads. Some new information was released at the Hot Chips conference.
New information presents improvements in multithreading, resilency improvements (Intel Instruction Replay RAS) and few new instructions (thread priority, integer instruction, cache prefetching, and data access hints).
Intel's Product Change Notification (PCN) 111456-01 lists four models of Itanium 9500 series CPU, which was later removed in a revised document. The parts were later listed in Intel's Material Declaration Data Sheets (MDDS) database. Intel later posted Itanium 9500 reference manual.
Processor number Frequency Cache 9520 1.73 GHz 20MB 9540 2.13 GHz 24MB 9550 2.40 GHz 32MB 9560 2.53 GHz 32MB
HP vs. Oracle
During the 2012 Hewlett-Packard Co. v. Oracle Corp. support lawsuit, court documents unsealed by a Santa Clara County Court judge revealed that in 2008, Hewlett-Packard had paid Intel around $440 million to keep producing and updating Itanium microprocessors from 2009 to 2014. In 2010, the two companies signed another $250 million deal, which obliged Intel to continue making Itanium CPUs for HP's machines until 2017. Under the terms of the agreements, HP has to pay for chips it gets from Intel, while Intel launches Tukwila, Poulson, Kittson, and Kittson+ chips in a bid to gradually boost performance of the platform.
Itanium 9700 (Kittson): 2017
Rumors of a successor to Poulson (code named Kittson) began to circulate in 2012–2013. This was at first associated with a forthcoming 22 nm shrink, and later revised in the face of declining Itanium sales to a less-ambitious 32 nm node. In April 2015, Intel, although it had not yet confirmed formal specifications, did confirm that it continued to work on the project. Meanwhile, the aggressively multicore Xeon E7 platform displaced Itanium-based solutions in the Intel roadmap.
In July 2016, the HP spinoff called Hewlett Packard Enterprise (HPE) announced in Computer World that Kittson would be released mid-2017. In February 2017, Intel reported that it was shipping Kittson to test customers, with plans to ship in volume later that year.
The models are:
Processor number Cores Threads Frequency Cache 9720 4 8 1.73 GHz 20MB 9740 8 16 2.13 GHz 24MB 9750 4 8 2.53 GHz 32MB 9760 8 16 2.66 GHz 32MB
In comparison with its Xeon family of server processors, Itanium has never been a high-volume product for Intel. Intel does not release production numbers. One industry analyst estimated that the production rate was 200,000 processors per year in 2007.
According to Gartner Inc., the total number of Itanium servers (not processors) sold by all vendors in 2007, was about 55,000. (It is unclear whether clustered servers counted as a single server or not.) This compares with 417,000 RISC servers (spread across all RISC vendors) and 8.4 million x86 servers. IDC reports that a total of 184,000 Itanium-based systems were sold from 2001 through 2007. For the combined POWER/SPARC/Itanium systems market, IDC reports that POWER captured 42% of revenue and SPARC captured 32%, while Itanium-based system revenue reached 26% in the second quarter of 2008. According to an IDC analyst, in 2007, HP accounted for perhaps 80% of Itanium systems revenue. According to Gartner, in 2008, HP accounted for 95% of Itanium sales. HP's Itanium system sales were at an annual rate of $4.4Bn at the end of 2008, and declined to $3.5Bn by the end of 2009, compared to a 35% decline in UNIX system revenue for Sun and an 11% drop for IBM, with an x86-64 server revenue increase of 14% during this period.
In December 2012, IDC released a research report stating that Itanium server shipments would remain flat through 2016, with annual shipment of 26,000 systems (a decline of over 50% compared to shipments in 2008).
By 2006, HP manufactured at least 80% of all Itanium systems, and sold 7,200 in the first quarter of 2006. The bulk of systems sold were enterprise servers and machines for large-scale technical computing, with an average selling price per system in excess of US$200,000. A typical system uses eight or more Itanium processors.
By 2012, only a few manufacturers offered Itanium systems, including HP, Bull, NEC, Inspur and Huawei. In addition, Intel offered a chassis that could be used by system integrators to build Itanium systems.
By 2015, only HP supplied Itanium-based systems.
The Itanium bus interfaces to the rest of the system via a chipset. Enterprise server manufacturers differentiate their systems by designing and developing chipsets that interface the processor to memory, interconnections, and peripheral controllers. The chipset is the heart of the system-level architecture for each system design. Development of a chipset costs tens of millions of dollars and represents a major commitment to the use of the Itanium. IBM created a chipset in 2003, and Intel in 2002, but neither of them developed chipsets to support newer technologies such as DDR2 or PCI Express. Before "Tukwila" moved away from the FSB, chipsets supporting such technologies were manufactured by all Itanium server vendors, such as HP, Fujitsu, SGI, NEC, and Hitachi.
The "Tukwila" Itanium processor model had been designed to share a common chipset with the Intel Xeon processor EX (Intel's Xeon processor designed for four processor and larger servers). The goal was to streamline system development and reduce costs for server OEMs, many of which develop both Itanium- and Xeon-based servers. However, in 2013, this goal was pushed back to "evaluated for future implementation opportunities".
Itanium is or was supported (i.e. Windows version can no longer be bought) by the following operating systems:
- HP-UX 11i; an Intel 64 (x86-64) port was proposed, but later canceled.
- Windows family
- Windows XP 64-Bit Edition (Unsupported; first Windows edition to support)
- Windows Server 2003 (Unsupported)
- Windows Server 2008 (Extended support until January 14, 2020. Extended support will only receive bug fixes and no new features, including support for future CPUs. This is the last version of Windows still with support for Itanium.)
- Windows Server 2008 R2 (This was the last version of Windows to support Itanium.)
- Linux distributions
- FreeBSD (unsupported in current 11; supported by legacy version (to April 2018 EOL) 10.3 as: "Tier 2 through FreeBSD 10. Unsupported after.")
- NetBSD (development branch only, but "no formal release is available".)
- OpenVMS I64 (to 2020); an Intel 64 (x86-64) port is being developed.
- NonStop OS; an Intel 64 (x86-64) port was developed.
- Bull GCOS 8
- NEC ACOS-4 (in late September 2012, NEC announced a return from IA-64 to the previous NOAH line of proprietary mainframe processors for ACOS-4.)
Microsoft announced that Windows Server 2008 R2 would be the last version of Windows Server to support the Itanium (support started with XP), and that it would also discontinue development of the Itanium versions of Visual Studio and SQL Server. Likewise, Red Hat Enterprise Linux 5 (first released in March 2007) was the last Itanium edition of Red Hat Enterprise Linux and Debian no longer supports Itanium and in addition Canonical chose to not support Itanium for Ubuntu 10.04 LTS (released in April 2010, now discontinued). HP will not be supporting or certifying Linux on Itanium 9300 (Tukwila) servers.
In late September 2012, NEC announced a return from IA-64 to the previous NOAH line of proprietary mainframe processors, now produced in a quad-core variant on 40 nm, called NOAH-6.
To allow more software to run on the Itanium, Intel supported the development of compilers optimized for the platform, especially its own suite of compilers. Starting in November 2010, with the introduction of new product suites, the Intel Itanium Compilers were no longer bundled with the Intel x86 compilers in a single product. Intel offers Itanium tools and Intel x86 tools, including compilers, independently in different product bundles. GCC, Open64 and Microsoft Visual Studio 2005 (and later) are also able to produce machine code for Itanium. According to the Itanium Solutions Alliance over 13,000 applications were available for Itanium-based systems in early 2008, though Sun has contested Itanium application counts in the past. The ISA also supported Gelato, an Itanium HPC user group and developer community that ported and supported open source software for Itanium.
Emulation is a technique that allows a computer to execute binary code that was compiled for a different type of computer. Before IBM's acquisition of QuickTransit in 2009, application binary software for IRIX/MIPS and Solaris/SPARC could run via type of emulation called "dynamic binary translation" on Linux/Itanium. Similarly, HP implemented a method to execute PA-RISC/HP-UX on the Itanium/HP-UX via emulation, to simplify migration of its PA-RISC customers to the radically different Itanium instruction set. Itanium processors can also run the mainframe environment GCOS from Groupe Bull and several x86 operating systems via instruction set simulators.
Itanium is aimed at the enterprise server and high-performance computing (HPC) markets. Other enterprise- and HPC-focused processor lines include Oracle's and Fujitsu's SPARC processors and IBM's POWER microprocessors. Measured by quantity sold, Itanium's most serious competition comes from x86-64 processors including Intel's own Xeon line and AMD's Opteron line. Since 2009, most servers were being shipped with x86-64 processors.
In 2005, Itanium systems accounted for about 14% of HPC systems revenue, but the percentage has declined as the industry shifted to x86-64 clusters for this application.
Supercomputers and high-performance computing
An Itanium-based computer first appeared on the list of the TOP500 supercomputers in November 2001. The best position ever achieved by an Itanium 2 based system in the list was #2 (while now all systems have dropped off the list), achieved in June 2004, when Thunder (Lawrence Livermore National Laboratory) entered the list with an Rmax of 19.94 Teraflops. In November 2004, Columbia entered the list at #2 with 51.8 Teraflops, and there was at least one Itanium-based computer in the top 10 from then until June 2007. The peak number of Itanium-based machines on the list occurred in the November 2004 list, at 84 systems (16.8%); by June 2012, this had dropped to one system (0.2%), and no Itanium system remained on the list in November 2012.
The Itanium processors show a progression in capability. Merced was a proof of concept. McKinley dramatically improved the memory hierarchy and allowed Itanium to become reasonably competitive. Madison, with the shift to a 130 nm process, allowed for enough cache space to overcome the major performance bottlenecks. Montecito, with a 90 nm process, allowed for a dual-core implementation and a major improvement in performance per watt. Montvale added three new features: core-level lockstep, demand-based switching and front-side bus frequency of up to 667 MHz.
|Codename||process||Released||Clock||L2 Cache/ |
|L3 Cache/ |
|Merced||180 nm||2001-06||733 MHz||96 KB||none||266 MHz||1||1||116||2 MB off-die L3 cache|
|800 MHz||130||4 MB off-die L3 cache|
|McKinley||180 nm||2002-07-08||900 MHz||256 KB||1.5 MB||400 MHz||1||1||130||HW branchlong|
|1 GHz||3 MB||130|
|Madison||130 nm||2003-06-30||1.3 GHz||3 MB||130|
|1.4 GHz||4 MB||130|
|1.5 GHz||6 MB||130|
|2003-09-08||1.4 GHz||1.5 MB||130|
|2004-04||1.4 GHz||3 MB||130|
|Deerfield||2003-09-08||1.0 GHz||1.5 MB||62||Low voltage|
|Hondo||2004-Q1||1.1 GHz||4 MB||400 MHz||2||1||260||32 MB L4|
|Fanwood||2004-11-08||1.6 GHz||3 MB||533 MHz||1||1||130|
|1.3 GHz||400 MHz||62?||Low voltage|
|Madison||2004-11-08||1.6 GHz||9 MB||400 MHz||130|
|2005-07-05||1.67 GHz||6 MB||667 MHz||130|
|2005-07-18||1.67 GHz||9 MB||667 MHz||130|
|Itanium 2 9000 series|
|Montecito||90 nm||2006-07-18||1.4 GHz||256 KB (D)+ |
1 MB (I)
|6–24 MB||400 MHz||1||2||104||Virtualization, Multithread, no HW IA-32|
|1.6 GHz||533 MHz|
|Itanium 2 9100 series|
|Montvale||90 nm||2007-10-31||1.42– |
|256 KB (D)+ |
1 MB (I)
|8–24 MB||400– |
|1||1–2||75–104||Core-level lockstep, demand-based switching|
|Itanium 9300 series|
|Tukwila||65 nm||2010-02-08||1.33– |
|256 KB (D)+ |
512 KB (I)
|10–24 MB||QPI with |
|1||2–4||130–185||A new point-to-point processor interconnect, the QPI,|
replacing the FSB. Turbo Boost
|Itanium 9500 series|
|Poulson||32 nm||2012-11-08 |
|256 KB (D)+ |
512 KB (I)
|20–32 MB||QPI with |
|1||4–8||130–170||Doubled issue width (from 6 to 12 instructions per cycle),|
Instruction Replay technology, Dual-domain hyperthreading
|Itanium 9700 series|
|Kittson||32 nm||2017-05-11 |
|256 KB (D)+ |
512 KB (I)
|20–32 MB||QPI with |
|1||4–8||130–170||No architectural improvements over Poulson,|
5 % higher clock for the top model
|Codename||process||Released||Clock||L2 Cache/ |
|L3 Cache/ |
High-end server market
When first released in 2001, Itanium's performance was disappointing compared to better-established RISC and CISC processors. Emulation to run existing x86 applications and operating systems was particularly poor, with one benchmark in 2001 reporting that it was equivalent at best to a 100 MHz Pentium in this mode (1.1 GHz Pentiums were on the market at that time). Itanium failed to make significant inroads against IA-32 or RISC, and suffered further following the arrival of x86-64 systems which offered greater compatibility with older x86 applications.
In a 2009 article on the history of the processor — "How the Itanium Killed the Computer Industry" — journalist John C. Dvorak reported "This continues to be one of the great fiascos of the last 50 years". Tech columnist Ashlee Vance commented that the delays and underperformance "turned the product into a joke in the chip industry". In an interview, Donald Knuth said "The Itanium approach...was supposed to be so terrific—until it turned out that the wished-for compilers were basically impossible to write."
Both Red Hat and Microsoft announced plans to drop Itanium support in their operating systems due to lack of market interest; however, other Linux distributions such as Gentoo and Debian remain available for Itanium. On March 22, 2011, Oracle Corporation announced that it would no longer develop new products for HP-UX on Itanium, although it would continue to provide support for existing products. Following this announcement, HP sued Oracle for breach of contract, arguing that Oracle had violated conditions imposed during settlement over Oracle's hiring of former HP CEO Mark Hurd as its co-CEO, requiring the vendor to support Itanium on its software "until such time as HP discontinues the sales of its Itanium-based servers", and that the breach had harmed its business. In 2012, a court ruled in favor of HP, and ordered Oracle to resume its support for Itanium. In June 2016, Hewlett-Packard Enterprise (the corporate successor to HP's server business) was awarded $3 billion in damages from the lawsuit.
A former Intel official reported that the Itanium business had become profitable for Intel in late 2009. By 2009, the chip was almost entirely deployed on servers made by HP, which had over 95% of the Itanium server market share, making the main operating system for Itanium HP-UX. On March 22, 2011, Intel reaffirmed its commitment to Itanium with multiple generations of chips in development and on schedule.
Although Itanium did attain limited success in the niche market of high-end computing, Intel had originally hoped it would find broader acceptance as a replacement for the original x86 architecture.
AMD chose a different direction, designing the less radical x86-64, a 64-bit extension to the existing x86 architecture, which Microsoft then supported, forcing Intel to introduce the same extensions in its own x86-based processors. These designs can run existing 32-bit applications at native hardware speed, while offering support for 64-bit memory addressing and other enhancements to new applications. This architecture has now become the predominant 64-bit architecture in the desktop and portable market. Although some Itanium-based workstations were initially introduced by companies such as SGI, they are no longer available.
- HP begins investigating EPIC.
- June: HP and Intel announce partnership.
- September: HP, Novell, and SCO announce plans for a "high volume UNIX operating system" to deliver "64-bit networked computing on the HP/Intel architecture".
- June: IDC predicts IA-64 systems sales will reach $38bn/yr by 2001.
- October: Dell announces it will use IA-64.
- December: Intel and Sun announce joint effort to port Solaris to IA-64.
- March: SCO admits HP/SCO Unix alliance is now dead.
- June: IDC predicts IA-64 systems sales will reach $30bn/yr by 2001.
- June: Intel announces Merced will be delayed, from second half of 1999 to first half of 2000.
- September: IBM announces it will build Merced-based machines.
- October: Project Monterey is formed to create a common UNIX for IA-64.
- February: Project Trillian is formed to port Linux to IA-64.
- August: IDC predicts IA-64 systems sales will reach $25bn/yr by 2002.
- October: Intel announces the Itanium name.
- October: the term Itanic is first used in The Register.
- February: Project Trillian delivers source code.
- June: IDC predicts Itanium systems sales will reach $25bn/yr by 2003.
- July: Sun and Intel drop Solaris-on-Itanium plans.
- August: AMD releases specification for x86-64, a set of 64-bit extensions to Intel's own x86 architecture intended to compete with IA-64. It will eventually market this under the name "AMD64".
- June: IDC predicts Itanium systems sales will reach $15bn/yr by 2004.
- June: Project Monterey dies.
- July: Itanium is released.
- October: IDC predicts Itanium systems sales will reach $12bn/yr by the end of 2004.
- November: IBM's 320-processor Titan NOW Cluster at National Center for Supercomputing Applications is listed on the TOP500 list at position #34.
- November: Compaq delays Itanium Product release due to problems with processor.
- December: Gelato is formed.
- March: IDC predicts Itanium systems sales will reach $5bn/yr by end 2004.
- June: Itanium 2 is released.
- April: IDC predicts Itanium systems sales will reach $9bn/yr by end 2007.
- April: AMD releases Opteron, the first processor with x86-64 extensions.
- June: Intel releases the "Madison" Itanium 2.
- February: Intel announces it has been working on its own x86-64 implementation (which it will eventually market under the name "Intel 64").
- June: Intel releases its first processor with x86-64 extensions, a Xeon processor codenamed "Nocona".
- June: Thunder, a system at LLNL with 4096 Itanium 2 processors, is listed on the TOP500 list at position #2.
- November: Columbia, an SGI Altix 3700 with 10160 Itanium 2 processors at NASA Ames Research Center, is listed on the TOP500 list at position #2.
- December: Itanium system sales for 2004 reach $1.4bn.
- January: HP ports OpenVMS to Itanium
- February: IBM server design drops Itanium support.
- June: An Itanium 2 sets a record SPECfp2000 result of 2,801 in a Hitachi, Ltd. Computing blade.
- September: Itanium Solutions Alliance is formed.
- September: Dell exits the Itanium business.
- October: Itanium server sales reach $619M/quarter in the third quarter.
- October: Intel announces one-year delays for Montecito, Montvale, and Tukwila.
- January: Itanium Solutions Alliance announces a $10bn collective investment in Itanium by 2010.
- February: IDC predicts Itanium systems sales will reach $6.6bn/yr by 2009.
- June: Intel releases the dual-core "Montecito" Itanium 2 9000 series.
- April: CentOS (RHEL-clone) places Itanium support on hold for the 5.0 release.
- October: Intel releases the "Montvale" Itanium 2 9100 series.
- November: Intel renames the family from Itanium 2 back to Itanium.
- December: Red Hat announces that it is dropping support for Itanium in the next release of its enterprise OS, Red Hat Enterprise Linux 6.
- February: Intel announces the "Tukwila" Itanium 9300 series.
- April: Microsoft announces phase-out of support for Itanium.
- October: Intel announces new releases of Intel C++ Compiler and Intel Fortran Compiler for x86/x64, while Itanium support is only available in older versions.
- March: Oracle Corporation announces that it will stop developing application software, middleware, and Oracle Linux for the Itanium.
- March: Intel and HP reiterate their support of Itanium.
- April: Huawei and Inspur announce that they will develop Itanium servers.
- February: Court papers were released from a case between HP and Oracle Corporation that gave insight to the fact that HP was paying Intel $690 million to keep Itanium on life support.
- SAP discontinues support for Business Objects on Itanium.
- September: In response to a court ruling, Oracle reinstitutes support for Oracle software on Itanium hardware.
- January: Intel cancels Kittson as a 22 nm shrink of Poulson, moving it instead to its 32 nm process.
- November: HP announces that its NonStop servers will start using Intel 64 (x86-64) chips.
- December: HP announces that their next generation of Superdome X and Nonstop X servers would be equipped with Intel Xeon processors, and not Itanium. While HP continues to sell and offer support for the Itanium-based Integrity portfolio, the introduction of a model based entirely on Xeon chips marks the end of an era.
- February: Intel ships test versions of Kittson, the first new Itanium chip since 2012.
- May: Kittson formally ships in volume as the Itanium 9700 series. Intel states that Kittson is the final Itanium generation.
- Morgan, Timothy (May 27, 2008). "The Server Biz Enjoys the X64 Upgrade Cycle in Q1". IT Jungle. Archived from the original on March 3, 2016. Retrieved October 29, 2008.
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|Wikimedia Commons has media related to Itanium.|
- Intel Itanium home page
- HP Integrity Servers home page
- Some undocumented Itanium 2 microarchitectural information
- IA-64 tutorial, including code examples at the Wayback Machine (archived July 6, 2011)
- Itanium Docs at HP
- Historical background for EPIC instruction set architectures