Peephole optimization

Peephole optimization is an optimization technique performed on a small set of compiler-generated instructions, known as a peephole or window,[1] that involves replacing the instructions with a logically equivalent set that has better performance.

For example:

  • Instead of pushing a register onto the stack and then immediately popping the value back into the register, remove both instructions
  • Instead of multiplying x by 2, do x + x
  • Instead of multiplying a floating point register by 8, add 3 to the floating point register's exponent

The term peephole optimization was introduced by William Marshall McKeeman in 1965.[2]

Replacements[edit]

Peephole optimization replacements include but are not limited to:[3]

  • Null sequences – Delete useless operations
  • Combine operations – Replace several operations with one equivalent
  • Algebraic laws – Use algebraic laws to simplify or reorder instructions
  • Special case instructions – Use instructions designed for special operand cases
  • Address mode operations – Use address modes to simplify code

Implementation[edit]

Modern compilers often implement peephole optimizations with a pattern matching algorithm.[4]

Examples[edit]

Replacing slow instructions with faster ones[edit]

The following Java bytecode:

aload 1 aload 1 mul 

can be replaced with the following which executes faster:

aload 1 dup mul 

As for most peephole optimizations, this is based on the relative efficiency of different instructions. In this case, dup (which duplicates and pushes the top of the stack) is known/assumed to be more efficient than aload (which loads a local variable and pushes it onto the stack).

Removing redundant code[edit]

The following source code:

 a = b + c;  d = a + e; 

is straightforwardly compiled to:

MOV b, R0  ; Copy b to the register ADD c, R0  ; Add  c to the register, the register is now b+c MOV R0, a  ; Copy the register to a MOV a, R0  ; Copy a to the register ADD e, R0  ; Add  e to the register, the register is now a+e [(b+c)+e] MOV R0, d  ; Copy the register to d 

but can be optimized to:

MOV b, R0  ; Copy b to the register ADD c, R0  ; Add c to the register, which is now b+c (a) MOV R0, a  ; Copy the register to a ADD e, R0  ; Add e to the register, which is now b+c+e [(a)+e] MOV R0, d  ; Copy the register to d 

Removing redundant stack instructions[edit]

If the compiler saves registers on the stack before calling a subroutine and restores them when returning, consecutive calls to subroutines may have redundant stack instructions.

Suppose the compiler generates the following Z80 instructions for each procedure call:

 PUSH AF  PUSH BC  PUSH DE  PUSH HL  CALL _ADDR  POP HL  POP DE  POP BC  POP AF 

If there were two consecutive subroutine calls, they would look like this:

 PUSH AF  PUSH BC  PUSH DE  PUSH HL  CALL _ADDR1  POP HL  POP DE  POP BC  POP AF  PUSH AF  PUSH BC  PUSH DE  PUSH HL  CALL _ADDR2  POP HL  POP DE  POP BC  POP AF 

The sequence POP regs followed by PUSH for the same registers is generally redundant. In cases where it is redundant, a peephole optimization would remove these instructions. In the example, this would cause another redundant POP/PUSH pair to appear in the peephole, and these would be removed in turn. Assuming that subroutine _ADDR2 does not depend on previous register values, removing all of the redundant code in the example above would eventually leave the following code:

 PUSH AF  PUSH BC  PUSH DE  PUSH HL  CALL _ADDR1  CALL _ADDR2  POP HL  POP DE  POP BC  POP AF 

See also[edit]

References[edit]

  1. ^ Muchnick, Steven Stanley (1997-08-15). Advanced Compiler Design and Implementation. Academic Press / Morgan Kaufmann. ISBN 978-1-55860-320-2.
  2. ^ McKeeman, William Marshall (July 1965). "Peephole optimization". Communications of the ACM. 8 (7): 443–444. doi:10.1145/364995.365000. S2CID 9529633.
  3. ^ Fischer, Charles N.; Cytron, Ron K.; LeBlanc, Jr., Richard J. (2010). Crafting a Compiler (PDF). Addison-Wesley. ISBN 978-0-13-606705-4. Archived from the original (PDF) on 2018-07-03. Retrieved 2018-07-02.
  4. ^ Aho, Alfred Vaino; Lam, Monica Sin-Ling; Sethi, Ravi; Ullman, Jeffrey David (2007). "Chapter 8.9.2 Code Generation by Tiling an Input Tree". Compilers – Principles, Techniques, & Tools (PDF) (2 ed.). Pearson Education. p. 540. Archived (PDF) from the original on 2018-06-10. Retrieved 2018-07-02.

External links[edit]

The dictionary definition of peephole optimization at Wiktionary